In order to manufacture a semiconductor device, in general, various processes such as film formation and pattern etching are repeatedly performed to a semiconductor wafer. In response to the demand for higher integration and miniaturization of a semiconductor device, the line width and the hole diameter have been reduced more and more. As a result, it is necessary to reduce electrical resistance of a wiring material and an embedding material. Therefore, there is the tendency that copper, which has small electrical resistance and is inexpensive, is used as the wiring material and the embedding material. When copper is used as the wiring material and the embedding material, tantalum (Ta) metal and/or a tantalum nitride (TaN) film are/is used as a barrier layer.
In order to embed copper in recesses formed in the surface of a wafer, in general, a thin seed film made of a copper film is formed on the entire surface of the wafer including inner surfaces of the recesses by using a plasma sputtering apparatus. Next, a copper plating process is performed to the entire surface of the wafer including the inner surfaces of the recesses to completely embed the film in the recesses. After that, an unnecessary portion of the thin copper film present on the surface of the wafer is removed by a chemical mechanical polishing (CMP) process.
This method will be described with reference to FIGS. 9 and 10(A) to 10(C). As shown in FIG. 9, a recess 2 in a form of an elongated groove having a rectangular cross section and a recess 4 in a form of a via hole or a through hole formed in a bottom of the recess 2 are formed in an insulating layer 3 formed on a semiconductor wafer W. The lower end of the recess 4 is connected with a wiring layer 6. When a conductive material is embedded in the recess 4, the wiring layer 6 and a wiring material embedded in the recess 2 are electrically connected with each other. Such a structure is called a dual-damascene structure. Only a trench (recess 2) or a hole (recess 4) may be provided independently. In recent years, the widths the recess 2 and the diameter of the recess 4 have been significantly reduced due to refinement of a design rule, and as a result, the vertical/transverse size ratio (aspect ratio) of the recesses has been increased, and is approximately 3 to 4, for example.
A method for embedding copper in the recess 4 in the form of a hole will be described with reference to FIG. 10. As shown in FIG. 10(A), a barrier layer 8 having a laminated structure composed of a TaN film and a Ta film is already formed on the surface of a semiconductor wafer W including inner surfaces of the recess 4 by a plasma sputtering apparatus. A seed film 10 made of a thin copper film is formed on the entire surface of the wafer including the inner surfaces of the recess 4. During the formation of the seed film 10, high frequency bias power is applied to the semiconductor wafer to draw metal ions of copper with high efficiency. Next, a metal film 12 made of, for example, a copper film is embedded in the recess 4 by performing a ternary copper alloy plating process to the surface of the wafer as shown in FIG. 10(C). In this case, the recess 2 which is in the form of a groove and is not shown in FIGS. 10(A) to 10(C) is embedded with the copper plating. After that, unnecessary portions of the metal film 12, unnecessary portions of the seed film 10 and unnecessary portions of the barrier layer 8, which are present on the surface of the wafer W, are removed by a CMP process.
In general, in a case where a film is formed by a plasma sputtering apparatus, the film formation rate is increased by applying bias power to the semiconductor wafer to promote drawing of metal ions. If the bias voltage is excessively large in this case, the surface of the wafer is sputtered by ions derived from an inert gas such as argon gas introduced in the processing space to generate plasma, and as a result, the metal film once deposited is removed. To avoid this, the bias power is not set to a high level.
When the seed film 10 made of a copper film is formed in the aforementioned way, an overhang 14 is formed in the seed film 10 in the vicinity of the upper open end of the recess 4 to narrow the opening of the recess 4 as shown in FIG. 10(B). A plating solution does not sufficiently penetrate into the recess 4 due to the presence of the overhang 14 during the plating process. Due to the insufficient penetration of the plating solution, a void 16 may be developed in the metal film 12.
To prevent the void 16, various additive agents are added to the plating solution in the copper plating process in order to promote deposition of the copper film onto the bottom surface of the recess 4 to embed the recess 4 in a bottom-up manner. Although a small amount of the additive agents remain in the copper plating film immediately after the copper plating process, the remaining additive agents can be removed by a high-temperature annealing process which is generally performed after the plating process.
If the line width and the hole diameter are not larger than 100 nm, however, the remaining additive agents, which could have been easily removed by the high-temperature annealing, cannot be sufficiently removed. If the additive agents remain in the copper film, electrical resistance of a wiring becomes larger, and as a result, designed electrical characteristics cannot be obtained. In addition, the remaining additive agents suppress the growth of copper grains during the annealing and reduce reliability of the copper film.
To avoid the problem with the additive agents, it has been considered to embed the entire recess 4 with the copper film only by the plasma sputtering process without performing the plating process. In this case, however, the overhang 14 is formed in the vicinity of the upper open end of the recess 4 as described above. It is, therefore, difficult for metal particles to reach the inside of the recess 4, and the void 16 will be unavoidably developed. In order to avoid this problem, it may be considered that the deposited metal film is melted at a high temperature and reflows to embed the recess, as taught by JP10-74760A and JP10-214836A. If the embedding material is aluminum having a low melting point, the reflow process can be performed. If the embedding material is copper having a high melting point, the reflowing is hardly occur. Therefore, the aforementioned reflow process is not a practical solution in the case of copper.